Parasitic inductance due to the sizeable lead lengths and component spacing typical in planar packaging can cause significantly impaired switching characteristics. This is of particular concern in metal-oxide-semiconductor field-effect transistor half-bridge modules, due to the effects of signal overshoot that are endemic in high-speed switching applications. Multi-functional components (MFCs) used as concurrent electrical, thermal, and mechanical module elements, and implemented in a stacked module design, can reduce parasitic degradation of power switching modules over a broad range of frequencies and applications. Devices stacked between copper layers with an integrated heat sink have been modeled from 1 kHz to 100 MHz to evaluate the efficacy of this design approach. This report derives the broadband parasitic inductance of the stacked module design, using magnetic field simulations that account for wide variations in skin depth through boundary layer meshing and compares the results to a commercially available, state-of-the-art half-bridge module.
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