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首页> 外文会议>Conference on enabling photonic technologies for aerospace applications >Noise Reduction and Control in Modelocked semiconductor Diode Lasers for Use in Next-Generation All-Optical Analog-to-Digital Converters
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Noise Reduction and Control in Modelocked semiconductor Diode Lasers for Use in Next-Generation All-Optical Analog-to-Digital Converters

机译：用于下一代全光学模数转换器的模型半导体二极管激光器中的降噪和控制

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External-cavity; actively-modelocked semiconductor diode lasers (SDLs) have proven to be attractive candidates for forming the backbone of next-generation analog-to-digital converters (ADCs), which are currently being developed to sample signals at repetition rates exceeding several GHz with up to 12 bits of digital resolution. Modelocked SDLs are capable of producing waveform-sampling puse trains with very low temporal jitter (phase noise) and very small flucturations in pulse height (amplitude noise)-two basic conditions that must be met in order for high-speed ADCs to achieve projected design goals. Single-wavelength modelocked operation (at nominal repetition frequencies of 400 MHz) has produced pulse trains with very low amplitude noise (approx0.08percent), and the implementation of a phase-locked-loop (PLL) has been effective in reducing the system's low-frequency phase noise (RMS timing jitter for offset frequencies between 10 Hz and 10 kHz has been reduced from 240 fs to 27 fs).
机译：外腔;已经证明，主动模型的半导体二极管激光器（SDL）是有吸引力的候选人，用于形成下一代模数转换器（ADC）的骨干，目前正在开发到重复率超过几个GHz的标志12位数字分辨率。模型SDL能够产生具有非常低的时间抖动（相位噪声）和脉冲高度（幅度噪声）的非常小的脉冲高度（幅度噪声）的波形采样隔板列车，以便高速ADC实现投影设计目标。单波长造型操作（以400 MHz的标称重复频率）产生了具有非常低的振幅噪声（大约0.08°）的脉冲序列，并且锁相环（PLL）的实现在减少系统的低中有效 - 从240 fs到27 fs减少了频率相位噪声（用于偏移频率的偏移频率的RMS时序抖动已经从240 fs降至27 fs）。

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